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  • Exam Code: C-HANATEC-19
  • Exam Name: Certified Technology Associate - SAP HANA 2.0 SPS07
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  • Exam Code: C-HANATEC-19
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NEW QUESTION: 1
Which LIF is associated with the admin vserver?
A. Admin LIF
B. Cluster LIF
C. Node management LIF
D. Data LIF
E. Cluster management LIF
Answer: E

NEW QUESTION: 2
What is the name of the core-to-core transport mechanism used in Intel XEON processors?
A. Crossbar switch
B. Northbridge
C. Hyper Transport
D. Quick Path Interconnect
Answer: D
Explanation:
The way I understand it, Crossbar is not a technology name, but a switch that assist in communication between processors, memory etc, allowing inter core & inter CPU communication. QPI, FSB & HT are all types of connections, connected to crossbar switches. All the answers are connected to crossbards, but only Intel has QPI. I would still go with QPI www.site.uottawa.ca/~mbolic/ceg4131/Report Crossbar switches.pdf
A. Intel Xeon 7500 architecture The Intel Xeon 7500 series processor architectures uses an 8 port crossbar switch which implements the Intel QuickPath Interconnect (QPI) and routing layers. The Intel QPI is point-point interconnection link developed by Intel [1] to compete with HyperTransport. Prior to using QPI the Intel architecture was using the Front Side Bus (FSB) [2] which was the bus that carried data between CPU and the memory controller(northbridge) and I/O controller(southbridge).
The off-chip single memory controller often was the bottleneck which prevented faster CPUs from improving the overall performance of the system. Now, with crossbar implementation the microprocessor were able to integrate the northbridge on-chip for faster access As well: (Thanx MaaShar from Belgium)
http://www.intel.com/content/www/us/en/io/quickpath-technology/quickpath-technologygeneral.html
Intel@ QuickPath Technology uses Intel@ QuickPath Interconnect, which provides high-speed, point-to-point links inside and outside of the processor. In contrast to parallel buses, these links speed up data transfers by connecting distributed shared memory, the internal cores, the I/O hub, and other Intel@ processors.

NEW QUESTION: 3

A. Option A
B. Option B
C. Option C
D. Option D
Answer: A,C

NEW QUESTION: 4
Refer to the exhibit. An extended ACL has been configured and applied to router R2 The configuration farted to work as intended.
Which two changes stop outbound traffic on TCP ports 25 and 80 to 10.0.20.0/26 from the 10.0.10 0/26 subnet while still allowing all other traffic? (Choose two)

A. The ACL must be moved to the Gi0/1interface outbound onR2
B. The ACL must be configured the Gi0/2 interface in bound on R1
C. Add a "permit ip any any" statement at the end of ACL 101 for allowed traffic
D. The source and destination IPs must be swapped in ACL 101
E. Add a "permit ip any any" statement to the beginning of ACL 101 for allowed traffic.
Answer: C,D

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